Advanced High Efficiency Architectures for Next Generation Wireless Communications

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Ka-band MMIC GaN Doherty Power Amplifiers: Considerations on Technologies and Architectures

This paper presents a comparison of two sample GaN technologies, one on Silicon and the other on Silicon Carbide substrate, when applied to the design of an integrated Doherty power amplifier. Two different target applications are considered, namely the satellite Ka-band downlink (17.3-20.3 GHz) and terrestrial communications in the n257 FR2 5G band (26.5-29.5 GHz), with different specifications but similar absolute frequency ranges. Considerations are made highlighting the advantages and disadvantages of the two technologies for the design of high-frequency MMIC Doherty Power Amplifiers in the presented scenarios

Watt-Level Ka-Band Integrated Doherty Power Amplifiers: Technologies and Power Combination Strategies Invited Paper

This paper discusses some of the design choices underlying the development of watt-level integrated Doherty power amplifiers in the K and Ka band, focusing on compound semiconductor technologies. The key aspect of on-chip power combination is discussed, presenting and comparing some of the possible alternatives. Then, the impact on the achievable bandwidth and performance of different parameters is quantified, adopting an approximate analysis, which focuses on the Doherty output combiner and allows estimating the non-linear performance of the amplifier thanks to some simplifying assumptions, without requiring a full, non-linear model of the active devices. Two sample GaAs and GaN technologies are compared first, considering parameters that are representative of the currently available commercial processes, and then several power combination strategies are analyzed, adopting the GaN technology, which is currently the only one that allows achieving the power levels required by the applications directly on chip. Finally, some hints as to the impact of the output parasitic effects of the transistors on the presented analysis are given

Assessment of the Performance of Inverse Class-F Power Amplifiers in a Discrete Doherty Architecture

This work presents an assessment, at simulation and experimental levels, of the performance of inverse class-F power amplifiers in a Doherty architecture. Two connectorized amplifier modules, designed for standalone operation, are adopted to construct a quasi-balanced Doherty architecture exploiting 3-dB 90° hybrid couplers at the input and output to demonstrate the concept. The Doherty architecture shows competitive performance at 1.8 GHz, with 43 dBm output power and around 60% efficiency from saturation to 6 dB output power back-off. The performance is in line with the state of the art of integrated load-modulated amplifiers, demonstrating the validity of the approach

Electro-magnetic Crosstalk Effects in a Millimeter-wave MMIC Stacked Cell

This work discusses the design of a 2-stacked cell at 36 GHz, analyzing the large discrepancies found between circuit-level and electro-magnetic (EM) simulations due to crosstalk (gate power leakage). At millimeter-wave frequencies, EM optimization of the inter-stage matching is crucial, however, its layout compactness poses several issues on the selection of the EM set-up, thus simulations reliability was put in doubt. To dispel this doubt the cell was fabricated and tested, demonstrating the effectiveness of EM predictions and the actual presence of gate power leakage. This required a deep re-design of the cell, currently on-going, based on a completely different inter-stage matching approach

Nonlinear Dynamic RF System Characterization: Envelope Intermodulation Distortion Profiles--A Noise Power Ratio-Based Approach

As radio frequency (RF) applications occupy larger bandwidths, nonlinear dynamics become nonnegligible. This work presents a theoretical framework capable of quantifying the impacts of nonlinear dynamic effects on RF systems through the observation of intermodulation distortion (IMD) profiles produced under multitone excitation. This framework defines static reference profiles and quantifies inband nonlinear dynamic effects as the error between the measured and reference profiles. This analysis demonstrates that classic linearity metrics, such as noise power ratio (NPR), adjacent-channel power ratio, and cochannel power ratio, do not have sufficient frequency resolution to reliably evaluate the impacts of nonlinear dynamics manifested in the IMD profiles produced by broadband RF systems. These observations result in a list of general characterization guidelines to overcome the limitations of classical linearity metrics in the assessment of nonlinear dynamics and the proposal and experimental validation of a novel method, swept-tone NPR, for the characterization of IMD profiles affected by nonlinear dynamic effects. Beyond this, the classic nonlinear dynamic mechanism, responsible for IMD asymmetry, is analyzed under multitone excitation at the system level for the first time, and the limitations of mechanism-based IMD analysis in the presence of nonlinear dynamic effects are evidenced with theoretical examples

Electro-magnetic Crosstalk Effects in a Millimeter-wave MMIC Stacked Cell

This work discusses the design of a 2-stacked cell at 36 GHz, analyzing the large discrepancies found between circuit-level and electro-magnetic (EM) simulations due to crosstalk (gate power leakage). At millimeter-wave frequencies, EM optimization of the inter-stage matching is crucial, however, its layout compactness poses several issues on the selection of the EM set-up, thus simulations reliability was put in doubt. To dispel this doubt the cell was fabricated and tested, demonstrating the effectiveness of EM predictions and the actual presence of gate power leakage. This required a deep re-design of the cell, currently on-going, based on a completely different inter-stage matching approach

A Balanced Stacked GaN MMIC Power Amplifier for 26-GHz 5G applications

This work reports the design and experimental characterization of a 4 W Ka-band MMIC power amplifier in GaN/SiC technology, featuring a balanced stacked architecture. The proposed amplifier is composed of a pair of 2-stage amplifier branches, each including a single-transistor driver stage and a 2-stacked-transistor power stage. Small-signal characterization exhibits very good agreement between measurements and simulations, while system-level characterization, employing a 50 MHz instantaneous bandwidth, 10 dB PAPR 5G FR2 signal, demonstrates the very promising linearity performance of the proposed amplifier. The measured minimum ACPR is better than -27 dBc up to an average output power of 24 dBm, from 25 GHz to 27 GHz

3-Way Doherty Power Amplifiers: Design Guidelines and MMIC Implementation at 28 GHz

This article presents the design strategy and the implementation of a three-way Doherty power amplifier (DPA3W) to enhance the efficiency at deep power back-off. Theoretical design equations are derived, based on which design charts are drawn to explore the available design space, accounting for practical constraints related to the available technology and selected application. The proposed design strategy is demonstrated by the design, fabrication and experimental characterization of a three-way multistage Doherty amplifier optimized for efficiency peaks at 6 and 12 dB back-off. The amplifier is realized on the WIN Semiconductors 150 nm GaN-SiC high-electron-mobility transistor (HEMT) monolithic process at 28 GHz, targeting 5G applications. The prototype achieves saturated output power in excess of 34 dBm and power added efficiency of the order of 15% from 6 to 12 dB back-off, demonstrating competitive performance and a good agreement between simulations and measurements, thus validating the approach

Watt-level 21-25 GHz integrated Doherty power amplifier in GaAs technology

This paper presents the design and characterization of a Doherty power amplifier for K-band applications based on the GaAs 150nm pHEMT technology of Qorvo. For the output power combiner, a wideband design approach, based on embedding the output capacitance of the active devices in the combiner, is applied. A state-of-the-art bandwidth of 4 GHz is achieved: in the 21 GHz-25 GHz range, the output power is above 29.5 dBm, with an associated PAE higher than 30 %. At 6 dB output back-off, the PAE is above 19% while the corresponding gain is higher than 10 dB